Contemporary electronic devices require multiple circuit elements including, for example, integrated circuits, flexible circuits, single and multi-layer circuit boards, chip scale packages and ball grid array packages. These circuit elements must be connected by multiple precise mechanical and electrical connections in order for the devices to function reliably. Numerous approaches have been made to make reliable electrical connections in a low cost and efficient manner. These approaches have met with varying degrees of success.
One basic approach involves plated through hole (PTH) printed wiring board fabrication processes, for making the mechanical and electrical connections in separate processing steps. A typical mechanical connection between printed circuit boards is made by placing a sheet of adhesive resin impregnated fiber mat between two double sided printed circuit boards to form an assembly. This assembly is then placed in a lamination press and bonded under heat and pressure, mechanically connecting the boards.
Electrical connection then occurs in a separate series of steps, commonly known as a plated through hole (PTH) process. This PTH process typically includes drilling holes in the circuit board where electrical contact between layers is desired, to create a via. These vias include walls that are cleaned and plated with conductive metallurgy.
However, this conventional PTH fabrication has several drawbacks. There are yield losses and reliability issues associated with the multiple step processing in PTH technology, resulting in increased costs as circuit feature size is reduced.
Processes that form the mechanical and electrical connections simultaneously potentially simplify the manufacturing process and reduce costs associated therewith. One method of simultaneously forming mechanical and electrical connections employs an adhesive ply with conductive buttons to attach circuit elements. For example, U.S. Pat. No. 5,282,312 (DiStefano et al.) discloses two metal flexible circuits patterned with PTH vias. The connection between circuit layers is made by an adhesive bond ply with patterned conductive buttons. The buttons are placed in the bond ply at locations where connections are desired between the circuit layers. The adhesive bond ply has sufficient rigidity such that conduction through the bond ply is only permitted at conductive buttons. One drawback to this construction is the required complex patterning process and subsequent registration of the bond ply to the circuit layers, that adds cost and decreases yield.
Another approach to making circuit element connections, such as those between chips and boards, flexible circuits to boards and other related circuit structures, and also to form inter-layer connections in circuit boards, involves making the mechanical and electrical connections simultaneously in one press step or a series of steps. An example of this approach involves using anisotropic or z-axis adhesives, a recently developed class of conductive adhesives, to replace solder for surface mounting. These anisotropic adhesives include adhesive films loaded with conductive particles at a much lower volume fraction than conventional isotropically conductive adhesives.
In operation, when pressed between conductors of circuit elements, the anisotropic adhesive film is compressed, such that the adhesive is forced out of the way of the conductors, while the conductive particles remain trapped between the conductors, forming electrical contacts therebetween. It is important for these anisotropic adhesive films to have a conductive particle loading that is sufficiently disperse to prevent particle shorting in the plane of the circuit.
U.S. Pat. No. 5,502,884 (Casson et al.) discloses a method for fabricating a multilayer circuit board, that uses an anisotropically conducting adhesive to connect multiple layers of double sided circuitry. However, the resultant circuit has drawbacks, in that the use of a random dispersion of particles can not provide the high density of hole (or via) interconnections required for high performance circuits due to the possible electrical shorting between contacts. In addition, the random dispersion of particles requires patterned masking of the circuit layers to prevent shorting between layers.
Circuit elements have also been connected with nonconducting adhesives, by using patterned bumps on the circuit elements. For example, U.S. Pat. No. 4,749,120 (Hatada) describes a mechanical connection between a semiconductor device having an array of conducting bumps and corresponding pads on a wiring board, with a nonconducting adhesive. During the bonding process, the bumps are forced through the adhesive, making electrical contact with their respective pads.
U.S. Pat. No. 5,401,913 (Gerber et al.) discloses multiple circuit layers having columns (bumps) of a metal. The circuit layers are mechanically connected by a nonconducting adhesive layer placed between each successive circuit layer.
The circuit layers are subsequently laminated in the presence of heat and pressure, such that the bumps are forced through the adhesive layer and contact their respective pads on the adjacent circuit layer.
For many of the above described interconnection techniques, it is requisite that the respective conducting particles or bumps penetrate the adhesive layer, in order to form an electrical connection between conductive members of the circuit elements. This requirement puts significant constraints on the selection of adhesives. For example, insufficient flow can result in trapping small amounts of adhesive between the conducting elements, resulting in high resistance bonds and/or environmentally unstable bonds. Alternately, too much flow of the adhesive typically results in adhesive deposits in undesired locations on the circuit elements or resultant circuit as well as bond line nonuniformity, detrimental to electrical performance. Excess adhesive flow can also starve regions in the bond of adhesive, resulting in voiding or regions of very thin bond lines, leading to reduced adhesion and poor environmental performance.